王者荣耀体验服下载资格要多久

CitationsRequest full-text85.28 · Sultan Qaboos University21.08 · Sultan Qaboos UniversityDo you want to read the rest of this article?
CitationsCitations6ReferencesReferences0ABSTRACT: When designing error detecting and correcting systems, cryptographic apparatus, scramblers and
other secure, safe and authenticated communication and digital system response data compression devices, the division of polynomials are frequently involved. Commonly, the process of division is implemented by using hardware known as Linear Feedback Shift Registers (LFSRs). In digital system testing the technique of Built-In Self Test (BIST) uses this LFSR based division process for response data compression and is popularly known as Signature Analyzer (SA). This paper presents a simulation experiment on the effectiveness study of the SA schemes. The finding of the results of the simulation study reveals that in SA in general the uses of primitive characteristic polynomials are the best. However, the study further investigates that the use of some critical primitive characteristic polynomials may reverse the effectiveness of the SA schemes i.e. lead to observe maximum aliasing errors. Full-text · Article · Sep 2011 ABSTRACT: Pseudo Noise (PN) sequence generator is one of the
important element in the designing of Code Division Multiple
Access (CDMA) system. To spread spectrum CDMA
applications each user is assigned with a PN sequence for the
purpose of spreading and dispreading. Various PN sequences
can be generated using Linear Feedback Shift Register (LFSR).
For an n-bit LFSR not all the characteristic polynomials but only
a few will be able to provide PN sequences. In practice a proper
and predefined characteristic polynomial of PN generators is
used in CDMA systems. However, LFSR circuits are
implemented with VLSI technology and a PN sequence
generator design may vary in respect to power dissipation, area
and propagation delay. Thus, in CDMA systems a careful
selection of PN generators is essential. This paper presents a
search procedure to obtain a list of characteristic polynomials so
that n-bit LFSRs can be implemented with minimum hardware
area. In this paper we also discuss the implementation of such
PN generators using Verilog HDL. Full-text · Article · Jan 2012 · WSEAS Transactions on Circuits and Systems Full-text · Conference Paper · Mar 2012 · WSEAS Transactions on Circuits and SystemsABSTRACT: Cyclic cross-correlation function between image pairs of maximal length pseudo-random binary sequences is studied. It is found that the peak of the cross-correlation remains constant for every possible image pairs of the sequences of the same length. However, this unique property is not valid for all the other possible pairs. Full-text · Article · Aug 2013 ABSTRACT: Signature analyzers equipped with primitive characteristic polynomials are known to be effective in minimizing aliasing errors. However several parameters exist which contribute to the issue of aliasing errors. Some of these issues are nonexistence of primitive trinomials over GF(2) of length 8k (where, k is a positive integer), length of signature analyzer and use of primitive characteristic polynomials realized with higher number of taps and power dissipation. This paper is aimed to look into the alternative of using of 8k length signature analyzer. Through a simulation experiment it is demonstrated that the use of 8k+1 length signature analyzer will prove better than the use of a length of an 8k. Full-text · Article · Dec 2013 · WSEAS Transactions on Circuits and Systems Full-text · Book · Nov 2014 · WSEAS Transactions on Circuits and SystemsConference PaperAugust 2001Conference PaperDecember 2009DataMay 2017Conference PaperJanuary 2002Data provided are for informational purposes only. Although carefully collected, accuracy cannot be guaranteed. Publisher conditions are provided by RoMEO. Differing provisions from the publisher's actual policy or licence agreement may be applicable.This publication is from a journal that may support self archiving.
oror log in with36.2: Speckle Suppression in a Scaled Holographic Display from Single Phase-Only Computer Generated Hologram - Chang - 2015 - SID Symposium Digest of Technical Papers - Wiley Online Library
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We proposed a method to suppress the speckle noise in scaled phase-only holographic display. First, the complex Fresnel hologram is calculated by using the scaled diffraction algorithm. Then the phase-only computer generated hologram (CGH) is calculated by using the error diffusion filter process. Based on this method, both of the amplitude and phase distribution on image plane reconstructed from the phase-only CGH are optimized. The phase distribution on the image plane is smoothed and uniform so the interference among adjacent pixels is greatly suppressed. The experiment results show a prominent effect in the reconstruction with speckle suppression compared with the conventional iterative based method.}

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